ASoC: qcom: Add QAIF driver for Shikra audio platform#723
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Add a dt-bindings header for the Qualcomm Audio Interface (QAIF) controller DAI IDs. This provides shared constants for devicetree sound-dai references and QAIF aif-interface reg values instead of using raw numeric IDs. Link: https://lore.kernel.org/all/20260605103739.3557573-2-harendra.gautam@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
Add a Devicetree binding for the Qualcomm Audio Interface (QAIF) CPU DAI controller used on the Shikra audio platform. QAIF moves PCM data between system memory and external serial audio interfaces through the AIF path, and between memory and the internal Bolero digital codec through the CIF path. The controller needs a binding so platform Devicetree files can describe its MMIO region, DMA IOMMU stream, clocks, interrupt, DAI cells and per-interface AIF configuration. Describe the single register region, one EE interrupt, the required GCC LPASS and audio core clocks, the DMA IOMMU mapping, and 'aif-interface@N' child nodes used for static PCM, TDM or MI2S configuration. Link: https://lore.kernel.org/all/20260605103739.3557573-3-harendra.gautam@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
Add MAINTAINERS coverage for the Qualcomm Audio Interface (QAIF) driver so changes to its devicetree binding, CPU DAI driver, and PCM platform driver are routed to the Qualcomm ASoC maintainers and lists. Link: https://lore.kernel.org/all/20260605103739.3557573-4-harendra.gautam@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
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PR #723 — validate-patchPR: #723
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PR #723 — checker-log-analyzerPR: #723
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Add qaif-reg.h with the MMIO register definitions for the Qualcomm Audio Interface (QAIF) hardware block. The QAIF driver needs these definitions to program the core registers, audio interfaces, AIF/CIF DMA channels, interrupt registers, SHRAM/QXM routing, and SID maps. Also add common accessor macros so the driver can select the appropriate AIF or CIF DMA register set based on the DAI ID. Link: https://lore.kernel.org/all/20260605103739.3557573-5-harendra.gautam@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
…erface Add qaif.h to define the common data structures used by the QAIF CPU DAI and PCM platform drivers. QAIF exposes AIF DMA paths for external audio interfaces and CIF DMA paths for the internal codec interface. Both paths need shared state for DMA channel allocation, regmap fields, interrupt dispatch, SHRAM buffer tracking and per-stream runtime data. Introduce the common QAIF driver data, AIF and CIF register-field descriptions, IRQ mapping helpers and the SoC variant descriptor. The variant descriptor provides the register layout, DMA channel counts, clock names, DAI table and platform callbacks needed by later QAIF driver code. Also define the QAIF-private MI2S port IDs used for the senary and septenary interfaces. Link: https://lore.kernel.org/all/20260605103739.3557573-6-harendra.gautam@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
Add DAI operations for the QAIF Codec Interface (CIF), which connects the QAIF DMA engine to the internal Bolero digital codec. The CIF CDC DMA DAIs need to program the interface configuration for each allocated RDDMA or WRDMA channel. Without these ops, the driver cannot configure the active channel mask or enable the interface control bits required when starting a playback or capture stream. Initialize the CIF DMA and interface regmap fields, program the active channel mask from hw_params(), and update the CIF interface controls from trigger() for stream start, stop, suspend, resume and pause transitions. Link: https://lore.kernel.org/all/20260605103739.3557573-7-harendra.gautam@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
Add the CPU DAI operations and regmap field setup needed to use the QAIF AIF (MI2S) path. The existing QAIF CPU support does not provide the AIF callbacks needed to configure and control MI2S playback and capture streams. Add the AIF- specific register field allocation and DAI callbacks to program the AUD_INTF configuration, set the MI2S bit clock, configure the codec DAI TDM format, and enable or disable the interface during stream triggers. This allows QAIF to route playback through RDDMA channels and capture through WRDMA channels to external serial audio devices over MI2S. Link: https://lore.kernel.org/all/20260605103739.3557573-8-harendra.gautam@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
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PR #723 — validate-patchPR: #723
Final Summary
Overall assessment: Commit message hygiene is excellent. Diff faithfulness and upstream status require manual verification by reviewer with network access.
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PR #723 — checker-log-analyzerPR: #723
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@mohsRafi , please review checkpatch and check-patch-compliance failures. Please fix or provide justification as required. |
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@quicAspratap, while porting from upstream to QLI 2.0 faced merge conflicts. Fixed merged conflicts because of this facing issue with check-patch-compliance. some checkpatch issue present in 1st post will fix in V2 and revert this change with new. |
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Test Matrix
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Multiple Qualcomm ASoC CPU DAI drivers need to resolve a sound-dai phandle argument to a DAI name by searching the component's DAI driver array by ID. Each driver currently implements this identically. Extract the common logic into asoc_qcom_of_xlate_dai_name() in common.c so it can be shared across drivers without duplication. Link: https://lore.kernel.org/all/20260605103739.3557573-9-harendra.gautam@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
Replace the private static asoc_qcom_of_xlate_dai_name() implementation in lpass-cpu.c with a thin wrapper that calls the new shared helper from common.c. This removes the duplicate implementation. Link: https://lore.kernel.org/all/20260605103739.3557573-10-harendra.gautam@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
Add the core CPU and platform bring-up needed for the Qualcomm Audio Interface driver. The existing QAIF DAI code needs device-level infrastructure before it can configure interfaces or run PCM streams. Add the MMIO regmap setup, including readable, writable and volatile register tables, so the driver can safely access QAIF control, DMA, interrupt and SHRAM registers. Parse the QAIF AIF child nodes from devicetree and store the per-interface PCM, TDM or MI2S configuration for use when programming the AUD_INTF registers. Add the platform probe, remove and shutdown entry points to map the device registers, initialize variant-specific resources, allocate regmap fields, acquire clocks and register the CPU DAI component. Add the QAIF PCM platform support needed for DMA streams, including PCM hardware constraints, coherent DMA buffer allocation using dma_alloc_coherent(), EE resource mapping, QXM DMA routing and SHRAM partitioning for AIF and CIF DMA channels. Link: https://lore.kernel.org/all/20260605103739.3557573-11-harendra.gautam@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
Add PCM operation callbacks for the QAIF platform driver so AIF and CIF DAIs can manage the DMA stream lifecycle. The callbacks allocate and release stream DMA channels, set the ALSA hardware constraints, manage the stream buffer, program the DMA registers during prepare, enable or disable DMA and interrupts on trigger, report the current DMA position to ALSA, and provide mmap support for userspace audio buffers. This completes the platform-side PCM support needed for QAIF playback and capture streams. Link: https://lore.kernel.org/all/20260605103739.3557573-12-harendra.gautam@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
…orm register Complete the QAIF PCM platform support by registering the component, requesting the QAIF interrupt, and handling DMA interrupt events. The QAIF hardware reports DMA events through a summary interrupt register and per-DMA status registers. Add the top-level IRQ handler and AIF/CIF DMA handlers so period interrupts notify ALSA with snd_pcm_period_elapsed(), xrun conditions are reported, and bus errors stop the affected stream. Add suspend and resume callbacks to put the QAIF regmap into cache-only mode while the clocks are disabled, then re-enable the clocks and sync the cached register state on resume. Read the SMMU stream ID from the iommus property during platform registration so the existing resource setup code can program the SID mapping correctly. Also add the component copy callback for transferring PCM data through the runtime DMA buffer. Link: https://lore.kernel.org/all/20260605103739.3557573-13-harendra.gautam@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
Add the Shikra variant data for the Qualcomm Audio Interface driver and hook it up to Kconfig and the qcom ASoC Makefile. Shikra uses QAIF to move PCM data between memory, MI2S interfaces and the Bolero codec CDC DMA paths. Without the SoC-specific register layout, DMA- to-DAI mappings, clock list and DAI descriptors, Shikra-based platforms cannot enable playback or capture through this block. Provide the Shikra QAIF register field definitions, DMA mappings, DAI descriptors, clock configuration and platform match data, and build them as part of the snd-soc-qcom-qaif module. Link: https://lore.kernel.org/all/20260605103739.3557573-14-harendra.gautam@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
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PR #723 — validate-patchPR: #723
Final Summary
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PR #723 — checker-log-analyzerPR: #723
Detailed report: Full report
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Test Matrix
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Introduces the Qualcomm Audio Interface (QAIF) driver for
the Shikra audio platform.
The driver follows the standard ALSA SoC split:
qaif-cpu.c: CPU DAI component. Manages clocks, initialises regmap
bitfield handles for all DMA and interface control registers, implements
DAI ops (startup/shutdown/hw_free/hw_params/trigger) for both AIF and
CIF paths, registers an of_xlate_dai_name callback so that sound-dai
references using non-sequential DAI IDs resolve correctly, and parses
per-interface TDM/MI2S configuration from DT child nodes.
qaif-platform.c: PCM platform component. Handles DMA buffer allocation
(dma_alloc_pages()), PCM ops (open/close/hw_params/prepare/trigger/
pointer/mmap/copy), two-level IRQ dispatch with period-elapsed
notification, and component suspend/resume across power collapse.
qaif-shikra.c: Shikra SoC-specific variant descriptor. Provides all
register field definitions, DMA-to-DAI index maps, SHRAM geometry,
clock names and the DAI driver array. This abstraction keeps the core
driver portable across future QAIF integrations.
qaif.h / qaif-reg.h: Shared data structures, constants and the complete
MMIO register address map consumed by both the CPU and platform drivers.
common.c/h: This series also adds asoc_qcom_of_xlate_dai_name(), a shared
helper that resolves a sound-dai phandle argument to a DAI name by
searching the component DAI driver array by ID. Both lpass-cpu.c and
qaif-cpu.c use thin wrappers around this helper, replacing duplicate
private implementations.
The series is split by functionality to aid review -- register map and
data structures first, then CIF ops, AIF ops, probe infrastructure, PCM
ops, IRQ handling and finally the Shikra variant glue.
Tested on Shikra with 48 kHz stereo MI2S playback and capture over the
Audio Interface Zero (AIF0) and Bolero CDC DMA RX/TX paths.
CRs-Fixed: 4573435
qli-2.0 GA Critical Fix