fix(projection): correct MI355X/gfx950 peak TFLOPS and XCD count#855
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Vivicai1005 wants to merge 1 commit into
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fix(projection): correct MI355X/gfx950 peak TFLOPS and XCD count#855Vivicai1005 wants to merge 1 commit into
Vivicai1005 wants to merge 1 commit into
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Vivicai1005
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wenxie-amd
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July 7, 2026 06:07
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Pull request overview
This PR updates the SDPA simulator’s built-in hardware profiles for AMD MI355X / gfx950 to match published CDNA4 datasheet peak throughput figures and the XCD count.
Changes:
- Update MI355X peak BF16/FP16/FP8 TFLOPS values.
- Update MI355X and gfx950 XCD count from 4 → 8.
- Mirror the same spec updates for gfx950 (noted as equivalent to MI355X).
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| peak_tflops_fp16=2500.0, | ||
| peak_tflops_fp8=5000.0, | ||
| hbm_bandwidth_gbps=8000.0, | ||
| n_cu=256, | ||
| n_xcd=4, | ||
| n_xcd=8, |
Comment on lines
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| peak_tflops_fp16=2500.0, | ||
| peak_tflops_fp8=5000.0, | ||
| hbm_bandwidth_gbps=8000.0, | ||
| n_cu=256, | ||
| n_xcd=4, | ||
| n_xcd=8, |
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Corrects the
mi355xandgfx950hardware profiles inprimus/core/projection/simulation_backends/sdpa_simulator.pyto matchAMD's published CDNA4 (MI350-series) datasheet.